• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    A Delta-Sigma modulator for one-bit analog to digital conversion of a signal (U(t)), such as a telephone voice channel signal to digital form is disclosed. The voice signal is sampled (1, 3, C1) at a rate high compared to the highest voice channel frequency component. Sampled instantaneous signal values are integrated (4, C3), re-sampled (10, 12, C4) and again integrated (17, C6) to reduce encoding noise. Finally, a bi-level sense identifying circuit (19) links the second integrator output to a D type flip-flop (20) providing the one-bit encoder output (b(n)). The sampling and integrator control is effected by switching in a capacitor charge shifting arrangement under clock control and feedback is applied as a capacitor switching program modification (301, 302).
    公开号:SU1336958A3
    申请号:SU823526948
    申请日:1982-12-22
    公开日:1987-09-07
    发明作者:Шеной Кишан；Прасад Агравал Бхагвати
    申请人:Интернешнл Стандарт Электрик Корпорейшн (Фирма)；
    IPC主号:
    专利说明:

    The invention relates to automation and computing and can be used to transmit an analog signal through a discrete channel.
    The purpose of the invention is to improve the accuracy of the modulator.
    Figure 1 shows the functional diagram of the device; Fig. 2 is a diagram of the execution of the reference block; figure 3 - timing diagrams of the signal generator pulses.
    The modulator delta-sigma (Fig. 1) contains a generator of 1 driving pulses, two blocks 2 and 3 quantization, two blocks 4 and 5 of reference, two integrators 6 and 7, a comparator 8 and a dynamic trigger 9.
    Each block 2 and 3 quantization contains two keys 10 and 11 and a capacitor 12.
    Blocks 4 and 5 (FIG. 1) contain sources 13 and 14 of positive reference voltage and negative reference voltage, respectively, three switches 15-17 and a capacitor 18. In addition, reference blocks 4 and 5 (figure 2 ) contain reference voltage source 19, keys 20–25 and two capacitors 26 and 27
    The modulator delta-sigma works as follows.
    The generator 1 of the driving pulses provides the triggering of the dynamic trigger 9 from the signal fg of the reference time and generates two forms of the clock signal Q to Q with the same frequency, but with a duty cycle of less than 50%. On fig.Z shows the shape of these signals and the position in time.
    The generator 1 of the driving pulses generates a signal that turns the key 10 on high and turns it off on low. Similarly, the signal G, is on key 11. Signals do not overlap in time, eliminating the possibility of simultaneous operation of keys 10 and I1. Assuming that the input signal U (t) remains constant throughout the interval (pT, (n + 1) T), then the capacitor 12 is charged for the duration of the signal Q to the level U (pT). Assume that the integrator 6 operational amplifier is ideal and during the course of the Q signal the entire charge on the capacitor 12
    2 de- 0, and G,
    It is transmitted to the feedback capacitor of the integrator 6. Then at t (n + 1) T the output voltage of the integrator 6
    X {n + 1) T X (pT) - (| -) U (nT),
    where C1 and C3 are the capacitances of the capacitor 12 and the feedback capacitor of the integrator 6, respectively (the increment is negative due to inversion).
    If the output signal b (n) is +1, i.e. If the signal is high, then capacitor 18 is charged before the voltage + V. If b (n) -1, then the capacitor 18 is charged before the voltage -V. During the QJ signal, this charge is transferred to the feedback capacitor of the integrator 6. Thus
    Х (п + 1) ТХ (пТ) - -U (nT) +
    25
     B (n) -V
    (.С2)
     NW
    where C2 is the capacitance of the capacitor 18. Similarly, we can write
    w (n-h) t w (nt) - (l -). x (nt)
    - b (n) -V
    (i 1-сз),
    35
    Triggering comparator 8 and trigger 9 provides dependency
    b (n-bl) sign {W (n + l) T.
    The noise characteristic and stability of the delta-sigma modulator are determined by the ratios of capacitors (C1 / Sz) and {C2 / Sz) capacitors in blocks 2-7.
    It has been found that for a conventional delta-sigma modulator, the following capacitor ratios are quite satisfactory. For blocks 2.4 and 6
    55 where C, C2, Sz - capacitors 12 and 18 and the integrator 6.
    Blocks 4 and 5 of the reference figure 2), made in another version, contain only one source 19 of the reference voltage. To increment the output voltage of the integrator 6, we can write:
    B (n) +1, LH
     (S.- SZ
    S5 SZ
    bJ,; - V D
    - (4-) U (nT).
    if b (n) -1, X - (Y) -Y - - (| -) and (pT)
    where C4, C5 - capacitors 26 and 27.
    Accordingly, if, then the total work of blocks 2 and 4 and integrator 6 can be written as follows:
    HH (n + 1) T x (nT) - (| -) U (nT) + + b (n) V. (| -).
    Similarly, for blocks 3 and 5 and integrator 7, you can write
    W (n 1) T W (nT) - (i-) X (nT) - b (n) .V. (5-)
    For practical implementation of the delta-sigma modulator (Fig. 2), the ratios of the capacitors 12.18 and 27 and the feedback capacitor of the integrator 6 are
    C5 C 1. C4 SZ SZ 2 C5 for blocks 3
     2,
    5 and integrator 7
    51- 25 1
    C4 C4
    2. Modulator POP.1, characterized in that each quota block is made on two keys and a capacitor, the first output of which is connected to the common bus, the output of the first key is connected to the second output of the capacitor and the information input of the second key, the output of the quantized block, the control inputs of the first and second keys and the information input
    The capacitance of the condenser 27 in block 4 of the first switch is correspondingly two times larger than the same condensate — the first and second drivers and
    torus in block 5.
    The quantization frequency must be higher than any component of the input signal with the highest frequency (signal U (t)).
    Thus, the operating characteristics of the delta-sigma modulator do not depend on the absolute value of the capacitors of the capacitors, but only on the coefficients of capacitance change. These coefficients are relatively independent of aging and temperature.
    50
    information inputs block vani quantum.
    3. The modulator according to claim 1, which is based on the fact that each reference block is made to a source of positive and negative ethod voltages, keys and a condenser, the first output of which is connected to a common bus, the outputs of the sources positive and negative reference voltages are connected to the information inputs of the first and second keys, respectively.
    1336958
    Form
    ula invention
    D
    0
    five
    0
    25
    0
    35
    40
    权利要求:
    Claims (4)
    [1]
    1. A delta-sigma module comprising a driver pulse generator and a first integrator, a comparator and a dynamic trigger, connected in series, the outputs of which are the modulator outputs, characterized in that, in order to improve the modulator accuracy, a second integrator is introduced into it quantization and reference blocks, the first and second outputs of the generator of the driving pulses are connected respectively to the first and second reference inputs of the quantization blocks and reference blocks, the information input of the first quantization unit is the modulator stroke, the output of the first quantization unit is combined with the output of the first reference unit and connected via the second integrator to the information input of the second quantization unit, the output of which is combined with the output of the second reference unit and connected to the input of the first integrator, the third output of the master pulse generator is connected to the synchronization input dynamic trigger, the direct and inverse outputs of which are connected respectively to the first and second control inputs of the first and second blocks of reference.
    [2]
    2. The POP.1 modulator, characterized in that each quantizing unit is made on two keys and a capacitor, the first output of which is connected to the common bus, the output of the first key is connected to the second output of the capacitor, and the information input of the second key, whose output is the output of the quantization unit the control inputs of the first and second keys and the information input
    the first key are the first and second master and
    0
    information inputs of the quantization unit.
    [3]
    3. The modulator according to A.1, about tl and - the fact that each unit of reference is made on the sources of positive and negative reference voltages, switches and a capacitor, the first output of which is connected to a common bus, the outputs of the sources of positive and negative reference voltages are connected to the information inputs of the first and second keys, respectively.
    which are combined and connected to the second capacitor and the information input of the third key, whose output is the output of the reference block, the setting inputs of the first and second keys are the first setting input of the reference block, the setting input of the third key, the control inputs of the second and first keys respectively, the second master, first and second control inputs of the reference block.
    [4]
    4. The modulator according to the claim that each block of reference is made on the source of the reference voltage, keys and capacitors, the output of the source of the reference voltage is connected to the information inputs of the first and second keys, the information input of the third key is connected with a common bus, and you369586
    the stroke is combined with the output of the first key and connected to the first output of the first capacitor, the second of which is connected to the information inputs of the fourth and fifth keys, the output of the fifth key is connected to the common bus, the output of the second key is connected to the information input of the sixth key and the first output of the second the capacitor, the second terminal of which is connected to the common bus, the outputs of the fourth and sixth keys are combined and are the output of the reference block, setting
    The 15 inputs of the first, second, and fifth keys are the first master input of the reference block, the clock inputs of the third, fifth, and sixth keys are the second master input of the reference block,
    20, the control inputs of the second and fourth in turn are the corresponding control inputs of the reference block.
    1T
    -W-J16 I i / 7
    .
    FIG. g
    Compiled by O. Tyurina Editor N. Bobkova Tehred L. Serdyukova Proofreader A. Zimokosov
    Order 4057/59 Circulation 901 Subscription
    VNIIPI USSR State Committee
    for inventions and discoveries 113035- Moscow, Zh-35, Ra vice embankment, d.4 / 5
    Production and printing company, Uzhgorod, st. Project, 4
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    同族专利:
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    FI830182L|1983-07-21|
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    ZA829475B|1983-11-30|
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    JP4845038B2|2007-03-01|2011-12-28|敏雄 鈴木|Steel coil fall prevention tool and fall prevention method|
    US7915838B2|2007-06-29|2011-03-29|Cypress Semiconductor Corporation|Delta-sigma signal density modulation for optical transducer control|
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    法律状态:
    优先权:
    申请号 | 申请日 | 专利标题
    US06/340,931|US4439756A|1982-01-20|1982-01-20|Delta-Sigma modulator with switch capacitor implementation|
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